GateMate FPGA Evaluation Board

GateMateTM FPGA Evaluation Board

The GateMateTM FPGA Evaluation Board is a feature-rich, ready-to-use development platform for the GateMate A1 and A2.

This reference design is your direct entry into application development. With the on-board programmer, both JTAG and SPI can be controlled via USB. User applications can be tailored to each of the six available I/O banks. Attaching additional hardware is a breeze thanks to the Pmod connectors: They allow access to a variety of peripheral boards, including motor controllers, sensors, displays and more. In addition, all SerDes lanes are accessible via SMA connectors for your high-speed applications.

➜ Learn more about GateMate FPGA

Features

  • GateMate A1 FPGA
    • 20,480 programmable elements (each with 8-input LUT-tree, 2x FF/Latches, 2-bit full-adder or 2x2-bit multiplier)
    • 0.9-1.1V core voltage, 1.2-2.5V I/O voltage
    • 32 dual-port block RAM cells, total: 1,280 Kbit
    • 4 configurable PLLs
    • 5 Gbit/s SerDes
    • all GPIO configurable as single-ended (total 162 signals) or LVDS differential pairs (total 81 pairs)
    • all GPIO support double data rate (DDR)
    • 324 balls 0.8 mm FPGA package, 15x15 mm
  • Interfaces
    • USB-JTAG + USB-SPI configuration interface
    • 2 Pmod-compatible ports
    • SerDes interface via SMA
    • 6 GPIO banks
  •  Memory
    • 64 Mbit Quad-I/O SPI flash @ 80 MHz
    • 64 Mbit HyperRAM @ 166 MHz
    • unpopulated footprint for secondary HyperRAM or HyerFlash module
  • Power
    • Powered from USB
    • adjustable Vcore (0.9-1.1V)
  • Dimensions
    • 100x160 mm (Eurocard standard)
Block Diagram

The GateMate Evaluation Board features the new GateMate A1 FPGA. In order to offer the widest possible range of applications for your evaluation, the evaluation board offers all the minimum required peripheral components such as memory, clock and access to a large number of interfaces and allows control over the core and IO voltages.

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Board Overview