Explore IPs and applications compatible with GateMate FPGAs. Enhance your FPGA designs with a variety of intellectual properties and applications tailored for GateMate solutions.
Integrated Logic Analyzer (ILA)
With the ILA, you can perform in-system debugging of your designs on the GateMate FPGA during runtime. It allows you to capture and analyze all signals of your design as a waveform directly within the FPGA. Monitor complex data flows in real-time and troubleshoot errors efficiently without disrupting the normal operation of your system.
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LiteX Support
The LiteX framework provides a convenient and efficient infrastructure to create FPGA Cores and SoCs. Explore various digital design architectures and create full FPGA based systems.
Choose from a variety of CPUs, display-, memory– or ethernet– controllers.
📄 GateMate Evaluation Board Support
📄 Olimex Evaluation Board Support
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TDC (Time-to-Digital Converter) IP Core
Discover the cutting-edge capabilities of our Time-to-Digital Converter (TDC) IP core, ideal for a wide range of high-accuracy timing solutions. With an unparalleled time resolution of only 5 picoseconds (!), it sets a new standard in precision and performance. All this is only possible thanks to the innovative CP-Line (Carry and Propagation) technology, with which every “CPE” is equipped.
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uniqueID™ PUF IP Core
Microscopic, chip-specific variations that arise during manufacturing can be used as a unique fingerprint, generating an PUF (Physically Unclonable Function) for each FPGA that can be used to create robust cryptographic keys for secure operations like bitstream encryption and decryption.
GateMate uniqueID™ Application Note
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EoL Support
Don‘t get stuck with your equipment using EOL FPGAs. Cologne Chip offers a secure and powerful path forward with GateMate FPGAs.
DVI Display Controller
With this controller, digital displays can be operated directly via the GateMate FPGA’s GPIOs without the need for additional hardware.
➜ Coming soon!
MIPI D-PHY Receiver
Use our brand-new controller to connect camera sensors directly to the GPIOs of the GateMate FPGA using the popular MIPI D-phy interface.
➜ Coming soon!
5G SerDes Example
Explore the capabilities of the hardened serializer/deserializer using the SerDes wizard.
➜ Coming soon!